Parasitic or stray capacitances occur in transformer design because of capacitive coupling of a winding to itself, to other windings, to internal shields or screens and to any mounting structure or hardware. These capacitances manifest themselves as unwanted current components in the leads of the transformer. The effect of these undesirable currents is to contribute to peak current stresses on the switch device and to generate unwanted electrical noise.
These deleterious manifestations become more pronounced as the switching frequency of power converters is increased. Two general reasons for this effect can be understood by an examination of the relationship between the voltage, v, and the current, i, in a lumped capacitor, C. In lumped capacitor terms, the relationship among these elements is given by the equation: EQU i=C.times.dv/dt
First, as the switching frequency is increased, the time allowed for voltage transitions is decreased. Thus, an increase in the instantaneous time rate of change of the voltage, dv/dt will occur at various points in the circuit, including the primary winding connections. Examination of the above equation reveals that an increase in dv/dt will necessarily produce a corresponding increase in the capacitive current and thereby increase the generation of unwanted noise.
Secondly, if the switching frequency of the power transformer is to be increased, the transformer must be designed for lower leakage inductance. Structural arrangements such as interleaved windings which area typically used to reduce leakage inductance tend to increase the winding to winding capacitance, thus increasing the effective value of C. Again from the above equation, an increase in the value of C will produce a corresponding increase in current i, and thereby increases the generated noise.
The bulk of the prior art methods for suppressing unwanted capacitive effects can be categorized into three general groups: shielding; winding configuration; and external/internal filtering. The first group of transformers combat capacitance by shielding methods incorporated into the transformer design. The basic concept in shielding is to block the electric field between two conductors (e.g. winding-winding, primary-secondary, winding chassis) and thereby eliminate the capacitive coupling between the two members. Some of the shielding methods employed by the prior art have included shielding the entire transformer structure, the separate winding structures, layers of windings or individual windings themselves. The materials used for shielding has also varied greatly. Some examples of materials used are conductive paint, strips, sheets and meshes. One significant problem with shielding techniques is the cost of implementation. For example, if a layered approach for intrawinding shielding is attempted, the cost of manufacture is greatly increased in order to accommodate the application of the conductive layer between the winding layers. Other problems with shielding techniques include; injury to the transformer during the application of the shielding (breaking of wires in a winding layer); accessibility to the windings and/or the entire transformer after installation of the shielding; mechanical interference in the transformer; and in general, shielding against capacitive coupling reduces the desired magnetic coupling.
The second broad area of capacitive current suppression techniques involve a particular configuration of the windings of the transformer. The most straightforward approach in reducing capacitive current is by directly reducing the transformer capacitance (less capacitance, less capacitive current). Unfortunately, all of these capacitance reducing techniques tend to increase the leakage inductance of the transformer, which is generally undesirable. Some configuration techniques involve forming the individual windings using a particular geometric configuration in the layer to layer relationships thereby reducing the intrawinding capacitance. As with shielding though, the manufacturing cost of this approach as compared with the actual reduction in capacitive current may render this solution unattractive. Another method of reducing the capacitive currents is to maximize the spacing between the elements of the transformer (e.g. secondary to primary windings, secondary to core structure). The design trade-off with this approach is that as the spacing is increased, the desired magnetic coupling is decreased.
Intrawinding capacitance is also reduced in many transformers by merely splitting the winding into two halves wired in series. Transformer designers may split the winding for other reasons with reduced capacitance being a secondary configuration. One method employed with a split primary winding is to arranged the two halves so there is a minimal intrawinding voltage and therefore a minimal distributed capacitive current. A final configuration approach that has been used is to offset the primary and secondary (sometimes tertiary) windings in order to minimize the interwinding capacitance. Again, the design trade-off with this method is a corresponding reduction in the desired magnetic coupling.
The last general area of capacitive current reduction methods lies in the "filtering" of the associated noise component. One method of reducing this noise is by following the transformer with some form of external RC circuit (external to transformer itself). This same method has also been extended to incorporate an integral distributed resistance which taps into the windings of the transformer, thereby, in effect forming a series of transformers and associated RC circuits. The filtering methods to date all require some sort of circuitry, either external or internal, in order to suppress the capacitive current. These filtering methods have some sort of undesirable impact on the performance of the transformer such as frequency limitations or an increased loss in the windings.